Failure Analysis Services Techniques and Trends
Proper failure analysis services can provide useful and cost-saving data for companies in control of their design and manufacturing processes. In this context, Sage speaks to their capability of identifying the nature or class of defects present in an IC that has failed one or more production tests.
Traditionally, this process consists of a variety of destructive and nondestructive tests to identify the location and nature of the defect and frequently is followed by an autopsy of the part for verification. This methodology is expensive and time consuming and often results in a no-trouble-found (NTF) conclusion.
Recently, there have been significant advances in the technology of IC failure analysis services by nondestructive electrical means alone. The goal of this new approach to failure analysis identifies the defects, maintains a database of information about each defect, and then looks for commonalities among the defects. We call this defect correlation analysis (DCA).
To achieve this goal, it is necessary to have a very exact process of defect identification using electrical test results only. Recent experiments have demonstrated that through the use of design-for-test (DFT) structures, such as scan, it is possible to identify the class or category of most defects and isolate the location of the defect to the library cell level or to within the cells themselves.
What do we do with all this information?
Before getting into the details of electrical fault isolation and what can and cannot be done using the various techniques, it is useful to understand how the information might be used. Imagine the example of a 5 million gate (about 20 million transistors) synthesized ASIC being manufactured. The failure rate is not extraordinary for such a device; the yields are in the 80% to 90% range. Still, the volumes are such that a 1% improvement in yield can amount to significant savings per year. For this reason, defect correlation studies are being conducted.
As the failing test data is returned, you can sort it with respect to similar failing responses and correlate it with logical diagnostics and optical data. From this analysis, a collection of failing devices is sent to the failure analysis lab for DCA.
As each device is analyzed, the information about the type of failure, the process being used, the library cells involved, likely defect locations within a library cell, and a myriad of other data are logged and placed into a database. In time, a profile of the most common forms of defects begins to arise.
In this case, the analysis may discover that the most common failure is a short, and it shows up frequently within the DFHCP1 and DFHCP2 models. Consequently, this analysis indicates a chronic problem in these two library cells.
Since the DCA database is not limited to just one device, additional checking shows that the same defect is present in a variety of ASICS and at a variety of locations on the die. As a result, some sort of interaction between the library model and the fabrication process for that particular cell is suspected.
Gathering the Appropriate Data
Sage’s failure analysis services are based primarily on data from scan chains and memory bit maps (from mBIST engines). The objective is to isolate the failure to a particular defect class and a particular region of the IC.
However, the test information needed to make an accurate diagnosis is not the same as the data needed to perform a quality production test. For one thing, to minimize test times, production tests tend to maximize the number of defects covered by a single test vector. In Sage’s failure analysis, the goal is to minimize the number of defects activated by a test vector.
What Defects Are We Talking About?
DCA is not intended as a process control mechanism. Short-term process control is the responsibility of the fab and can be adequately maintained by other mechanisms.
DCA is a statistical quality-control methodology that targets longer-term trends, analyzing the processes and designs and looking for ways in which both might be changed to produce higher yields. For this reason, defects are examined by categories rather than specific causes. For example, a resistive via, a stress-cracked metal track, and a missing poly interconnect would all be classified as opens. A metal splinter, an under-etched poly layer, and a metal filament would all be bridges.
We invite you to contact us today and schedule a time to visit our failure analysis laboratory in San Diego, California to learn about our various failure analysis techniques and processes.